Measurement of half-bridge parasitic impedances using a flexible test probe
A. Llamazares, S. Martín-Arroyo and M. García-Gracia Department of Electrical Engineering EINA, Zaragoza University, Campus Río Ebro – Zaragoza (Spain) 2026-01-20

Abstract

The use of SiC MOSFETs in power applicationsallows to increase power density and efficiency because switching frequencies are higher. However, parasitic impedances are responsible for oscillations that can have negative effects.

In this paper we analyse the parasitic impedances of a half-bridge formed by a busbar PCB laminated with SiC MOSFETs. Using the distributed parameter approach, we have developed a procedure to characterize the impedance of the switching current loop responsible for the oscillations in the switching. According to the above, the conclusions obtained will be presented.

Key words: SiC inverter, parasitic impedance, half-bridge.

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